The present invention relates to locking one frequency signal to another frequency signal, and more particularly to a phase locked loop with reduced phase noise that shifts the energy of the phase noise to higher frequencies.
The conventional way to lock a f*N voltage controlled oscillator (VCO) to an f*M frequency reference, where N and M are integers and f is a common frequency component, is to divide the two frequency signals by the integers N and M respectively and phase lock the resulting f frequency outputs together. If N and M are large, however, this approach may not provide sufficient loop bandwidth to overcome phase noise in the VCO. The loop bandwidth should not be much over f/10.
One prior art way of addressing this loop bandwidth problem is to synthesize an approximation of f*M/P using hardware running on the f*N frequency clock. Here P is a small integer such that M/P&lt;N. For example if f=1 Hz, N=1000, M=1007 and P=4, a 1007/4 (f*M/P)=251.75 Hz approximation is synthesized from the 1000 Hz (f*N) source as follows. On every 1000 Hz clock an accumulator is incremented by 1007. If the result is positive, the accumulator is decremented by P*N=4000 and an output pulse is generated. The 1007 Hz (f*M) clock is divided by 4 and used to lock the 251.75 Hz approximation just generated. With a slow enough loop filter, this gives the desired results. However the phase noise of the 251.75 Hz approximation has significant low frequency energy requiring the slow loop response.
Another prior art way for addressing this loop bandwidth problem is to synthesize a sine wave of frequency f*M/P using hardware running on the f*N frequency clock. In this case P is such that M/P&lt;N/2. The sine wave is synthesized using a read only memory (ROM) look-up table on the upper (or all) bits of a first (only) accumulator, followed by a digital to analog converter and a narrow band pass filter at the frequency f*M/P. The sine wave is squared up and used in a phase comparator as in the above prior art method. This method allows a fast loop response, but requires more analog parts and the phase alignment is very sensitive to the accuracy of the band pass filter components.
What is desired is a phase locked loop with reduced phase noise that allows a fast loop response.